The Latency bench build in MaxxPI²,
measures the random access (worst case) latency of an computer's
memory subsystem. It models the real-world access pattern of software applications
that use lists, link lists, trees, or hash tables for example.
The latency of a random memory access is the sum of the L1 and L2
(and L3 if available) cache miss latencies, the translation lookaside
buffer (TLB) latency, and the latency of the memory module(s) itself.
Reached results (score):
Is given in nanoseconds (ns) and shows the arithmetic average
between: "Latency (min.) minimum" and "Latency (max.) maximum"
of 8 passes.
Further given informations:
Benchtime (Benched in) shows the time needed to run latencybench.
Displaytime (Displayed in), shows the time needed to show the current resultset.